This invention relates to apparatuses for correcting a horizontal distortion of an image displayed on a CRT display apparatus and, more specifically, to a PLL circuit using a residual phase and a drive circuit of a CRT display apparatus using the PLL circuit.
In recent years, CRT display apparatuses for computers generally support various scanning frequencies. However, distortion due to assembly accuracy error is inevitable in an image displayed on the CRT display apparatus. Such distortion includes horizontal distortion causing an image to be deformed in the horizontal direction. The horizontal distortion includes center-displaced distortion, parallelogram distortion, and arcuate distortion. The phase of a horizontally-distorted image is shifted in the horizontal direction. To be properly displayed, the distorted image has to be corrected in the horizontal direction. Described briefly below are these horizontal distortions with reference to FIGS. 31, 32, 33, and 34.
First, FIG. 31 shows the relation between an undistorted image and various signals constructing video signals which generate the image. In the drawing, Hysnc denotes a horizontal synchronizing signal generating a pulse with a predetermined period. Ihd denotes a horizontal deflection current. Sv denotes a video signal for one frame. The horizontal deflection current Ihd synchronizes with the horizontal synchronizing signal Hsync, while the horizontal synchronizing signal Hsync and the video signal Sv have a constant temporal relation.
In one example shown in FIG. 31, the processing between time t1 and time t7 is repeated after the time t7. Therefore, described briefly below is the relation between the video signal and the image between the time t1 and the time t7. As shown in the drawing, an H pulse Hp is a pulse signal rising at the time t1, falling at time t3, and rising at the time t7. The horizontal deflection current Ihd reaches its peak value at time t2 in the H pulse Hp, and reaches its minimum value at time t4. The horizontal deflection current Ihd linearly increases from the time t4, and reaches its peak value at the time t8.
In response to the trailing edge of the horizontal deflection current Ihd at the time t4 after a predetermined period (RiL) from the time (time t3) of the trailing edge of the pulse of the horizontal synchronizing signal Hsync, the video signal Sv starts rendering a raster image for one line. The raster image rendering ends at time t6 preceding the time t8 for a predetermined period (RiR). The interval between a raster frame Fr and a video frame Fv corresponding to the period RiL between the time t4 and the time t5 is herein called a left-retrace-line period RiL. Similarly, the interval between the raster frame Fr and the video frame Fv corresponding to the period RiR between the time t6 and the time t8 is herein called a right-retrace-line period RiR.
The image frames displayed on the CRT display apparatus upon receipt of these video signals are laid out as follows. Each image frame is cocentrically displayed with respect to a display frame Fc of a cabinet of the CRT display apparatus, allowing the user to feel quite normal in recognizing the image. For this purpose, the image displayed on the CRT display apparatus includes two types of images, which are distinguished as the raster frame Fr and the video frame Fv. The raster frame Fr is a frame displayed by a collection of scanning lines called raster, being scanned in a range larger than the cabinet display frame Fc.
That is, the raster frame Fr projected on the cabinet display frame Fc can be viewed as the raster frame Fr therethrough. The video frame Fv represents the actual image. In the figure, assuming that the scanning lines runs from the left end to the right, the left-retrace-line RiL from the left end of the raster frame Fr to the left end of the video frame Fv is generally constant. The left-retrace-line RiL is constant because the horizontal deflection current Ihd synchronizes with the horizontal synchronizing signal Hsync, and therefore the temporal relation between the horizontal synchronizing signal Hsync and the video signal Sv is constant. Similarly, the right-retrace-line RiR is also constant.
FIG. 32 shows a state of a distorted image with its center displaced. The raster frame Fr and the video frame Fv are displaced with respect to the cabinet display frame Fc in the horizontal direction, and as a result the video frame Fv is shifted from the center of the cabinet display frame Fc.
FIG. 33 shows a state of an image distorted in a parallelogram shape. The raster frame Fr is distorted to be a parallelogram shape with respect to the cabinet display frame Fc, and as a result the video frame Fv is also distorted in a parallelogram shape.
FIG. 34 shows distortion called arcuate distortion, in which the scan start position (the left end in the drawing) in the raster frame Fr is arcuately shifted, and therefore the video frame Fv is also viewed as arcuately distorted. These horizontal distortions as shown in FIGS. 32, 33, and 34 do not necessarily occur independently, but may occur as combined.
These distortions in the horizontal direction are caused not by the divergence of the relation among the above described horizontal deflection current Ihd, video signal Sv, and horizontal synchronizing signal Hsync which is a start signal of the video signal Sv, but by mechanical mounting accuracy error of a deflection controller mainly including a deflection coil of the CRT, non-uniformity of the generated magnetic field, and other reasons.
Therefore, in recent years, to reduce distortion in the displayed image and maintain image quality, the CRT display apparatus is equipped with a distortion correcting circuit capable of adjusting the amount of correction of the image distortion according to scanning frequencies.
With reference to FIGS. 35 and 36, described below is an example of image distortion due to mechanical mounting accuracy error of the deflection controller. First, FIG. 35 shows a state in which the deflection controller normally mounted on the CRT display apparatus scans the electron beam in the vertical direction. For viewability, the figure does not include components not required for description herein such as a glass tube of the CRT. In this example, the deflection controller is constructed of deflection magnetic poles 6 and their drive circuits (not shown).
An electron beam Eb emitted from an electronic gun 5 collides against a fluorescence surface of the CRT forming a screen, deflected and scanned in the vertical direction by the deflection magnetic poles 6, and viewed as an emission line Lb on the screen. The emission line Lb is vertical with respect to a horizontal line Lh on the display screen of the CRT if the deflection controller is mounted on the CRT display apparatus correctly with respect to the CRT.
On the other hand, FIG. 36 shows a state in which the deflection controller is mounted on the CRT display apparatus, being slightly inclined toward the CRT. In this example, compared with the case in FIG. 35, the deflection magnetic poles 6 are inclined an angle a (not shown) toward the CRT. Consequently, when the deflection magnetic poles 6 deflects the electron beam Eb for scanning in the vertical direction, the emission line Lb on the display screen of the CRT is not vertical but inclined to the horizontal line Lh. This is the main reason for the parallelogram distortion.
In other words, parallelogram distortion of the frame displayed on the CRT is caused not by the distortion of various video signals such as Hsync, Ihd, and Sv shown in FIG. 31, but by an assembly error of the CRT. Similarly, center-displaced distortion is caused also by an assembling error of the deflection controller. Although arcuate distortion is caused mainly by distortion of a deflection magnetic field or deflection electric field, this is caused not by an electric signal which controls the deflection magnetic field or deflection electric field-but by an assembly accuracy error of the deflection controller, which is the same reason as that for parallelogram distortion.
Conventionally, to correct these horizontal-direction distortions, a method using a centering circuit has been solely used.
FIG. 37 shows a conventional CRT display apparatus equipped with a horizontal distortion correction apparatus using a centering circuit. A CRT display apparatus Ccrt mainly includes a signal separation controller 11, a CRT 24, a horizontal distortion correction apparatus HDC, a centering adjuster 180, and a controller 22.
The signal separation controller 11 separately outputs a video signal Svi, a V pulse Vp for vertical deflection, and an H pulse Hp for horizontal deflection from an input signal Si from a signal source (not shown) such as a computer externally provided. The H pulse Hp is a signal synchronizing with the horizontal synchronizing signal Hsync, which is a start signal of the video signal Svi.
The CRT 24 is connected to the signal separation controller 11, including a video signal controller 12 receiving input of the video signal Svi and a vertical deflection controller 13 receiving input of the V pulse Vp. The video signal controller 12 converts the video signal Svi into the electron beam Eb, emitting the same onto the CRT 24. The vertical deflection controller 13 controls vertical deflection of the above described electron beam Eb based on the V pulse Vp. For this vertical deflection, a method of either magnetic field deflection or electronic field deflection can be taken.
The horizontal distortion correction apparatus HDC is connected to the signals separation controller 11, controlling horizontal deflection of the electron beam Eb based on the H pulse Hp supplied from the signal separation controller 11. Similarly to the vertical deflection controller 13, either method of controlling a magnetic field or an electronic field can be taken. The present invention, which will be described in detail later, relates to a horizontal distortion correction apparatus for correcting horizontal distortion of an image due to an assembly accuracy error of the CRT display apparatus by correcting a video signal. Therefore, also for the conventional art, detailed description of the video signal controller 12 and the vertical deflection controller 13 is omitted herein, and only the horizontal distortion correction apparatus HDC is described herein in detail.
The horizontal distortion correction apparatus HDC is constructed of a PLL circuit 14, a horizontal deflection power source 15, coupling coils 16 and 17, a centering circuit 18, a horizontal drive coil 19, a linearity coil 20, and an S-shaped capacitor 21. The PLL circuit 14 will be described later in detail with reference to FIG. 39.
The PLL circuit 14 is supplied with the H pulse HP, and produces a sawtooth horizontal deflection current Ihd synchronizing therewith. The horizontal deflection power source 15 provides direct-current high voltage through the coupling coil 16 to the drive coil 19 placed thereafter. The horizontal drive coil 19 applies a magnetic field onto the electron beam Eb emitted from the electronic gun 5 to deflect the beam in the horizontal direction. The linearity coil 20 and the S-shaped capacitor 21 are used for correcting deflection of the electron beam Eb.
The centering circuit 18 superposes a direct current Ic on the horizontal deflection current Ihd supplied through the coupling coil 17 from the PLL circuit 14. As a result, the horizontal deflection current Ihd is biased, shifting the raster frame in the horizontal direction to correct the center-displaced distortion. In this sense, the current Ic is herein called a horizontal distortion correction current. The horizontal distortion correction current Ic is adjusted by a user operating the centering circuit 18 through the centering adjuster 180. That is, the user operates the centering adjuster 180 while viewing the frames displayed on the CRT 24 to correct the shift of the video frame Fv.
Next, in FIG. 38, shown is the relation between the horizontal deflection current Ihd and the horizontal distortion correction current Ic at the time of adjusting the shift of the video frame Fv as described above. The horizontal deflection current Ihd is a sawtooth wave having the amplitudes h1 and h2 of the same amount on positive and negative sides centering on 0 A (ampere). The 0 A level of the horizontal deflection current Ihd defines a center O for each scanning line constructing the raster frame Fr. The raster frame Fr defined by such normal horizontal deflection current Ihd being displayed on the CRT having horizontal distortion is shown as a horizontally-distorted raster frame Frh.
As described above, a center Op of the raster frame Frh parallelogram-distorted due to the factors in assembling the CRT is displaced from a center Oc of the cabinet display frame Fc. In the example shown in the drawing, the left part to the center Op of the parallelogram-distorted raster frame Frh of the video frame Fv are viewed more through the cabinet display frame Fc. In other words, the video frame Fv is viewed as shifted to right with respect to the cabinet frame center Oc: the horizontal deflection current Ihd looks as if it is shifted to positive, or the amplitude h1 in positive looks as if it is larger than the amplitude h2 in negative. Such video frame Fv shifted in the horizontal direction is herein called horizontally-distorted video frame Fvh (not shown).
Thus, to cancel out the apparent shift of the horizontal deflection current Ihd, the centering circuit 18 is operated to superpose in the negative direction the DC current horizontal distortion correction current Ic corresponding to the above shift in the horizontal direction. This horizontal distortion correction current Ic corresponds to a negative amplitude hic in the horizontal deflection current Ihd. Therefore, the positive amplitude h1 is reduced by hic to h1xe2x80x2, while the negative amplitude h2 is reduced by hic to h2xe2x80x2. As a result, the amplitudes h1xe2x80x2 and h2xe2x80x2 become |h1xe2x80x2| less than |h2xe2x80x2|.
That is, the phase of the horizontal deflection current Ihd is shifted, that is, delayed, in the negative direction for the amount of horizontal distortion correction current Ic. The amplitude of such horizontal deflection current Ihd becomes asymmetric h1xe2x80x2 and h2xe2x80x2 centering on 0 A. With the raster frame Fr shifted to left with respect to the cabinet display frame Fc, the center-displaced distortion of the parallelogram-distorted video frame Frh is corrected, and the video frame Fv is displayed.
FIG. 39 shows the configuration of the PLL circuit 14. The PLL circuit 14 includes a phase comparator 29, a low pass filter (hereinafter referred to as LPF) 30, a voltage control oscillator (hereinafter referred to as VCO) 31, a 1/N frequency divider 32, a pulse generator 33, and a horizontal output circuit 34. The phase comparator 29 is connected to the signal separation controller 11 of the CRT display apparatus Ccrt for receiving input of the H pulse Hp. The phase comparator 29 is further connected to the horizontal output device 34 for receiving input of a flyback pulse FBP which is a signal indicative of start of the horizontal deflection scanning for each 1H (horizontal synchronizing period).
The phase comparator 29 generates a phase difference signal Sdp corresponding to the phase difference between the supplied H pulse Hp and the flyback pulse FBP. The LPF 30 integrates the phase difference signal Sdp supplied from the phase comparator 29 and converts the same into a phase difference voltage Vdp. The VCO 31 generates an oscillation signal So having a frequency corresponding to the phase difference signal Sdp supplied from the LPF 30.
In the VCO 31, its oscillation frequency OF varies according to input voltage. The VCO 31 is designed to operate with VCO control reference voltage (hereinafter referred to as VCSV) between oscillation maximum input voltage VOmax corresponding to an oscillation maximum frequency FOmax and oscillation minimum input voltage corresponding to an oscillation minimum frequency. The oscillation frequency OF and the oscillation input voltage VO depend on the design of the VCO 31, the characteristics of its components, and the like.
Since having a frequency higher than that of the desired horizontal deflection current Ihd, the oscillation signal So oscillated in the VCO 31 is divided by the 1/N frequency divider 32 into a desired frequency, and a frequency-divided signal Sd is generated. Note that N is the reciprocal of the frequency ratio between the desired frequency and the supplied frequency signal So. Based on the frequency-divided signal Sd having the desired frequency, the pulse generator 33 generates a pulse Pd having a desired duty ratio. Based on this pulse Pd, the horizontal output device 34 generates the horizontal deflection current Ihd, and supplies the same to the horizontal drive coil 19 and others.
The horizontal output device 34 generates the horizontal deflection current Ihd and also the flyback pulse FBP corresponding to the horizontal deflection current Ihd. The flyback pulse FBP is fed-back to the phase comparator 29, and another flyback pulse FBP is again generated based on the H pulse Hp supplied from the signal separation controller 1. This processing is herein called horizontal synchronization processing of one cycle. Based on the flyback pulse FBP generated in the current horizontal synchronization processing, the next horizontal synchronization processing cycle is executed.
FIG. 41 schematically shows the process of the PLL circuit 14 generating the horizontal deflection current Ihd that synchronizes with the H pulse Hp. In the drawing, Dp represents the phase difference between the H pulse Hp supplied to the phase comparator 29 and the flyback pulse FBP corresponding to each H pulse Hp. The phase comparator 29 produces the phase difference signal Sdp corresponding to the phase difference Dp between H pulse Hp and the.flyback pulse FBP. The LPF 30 converts the supplied phase difference signal Sdp into phase difference voltage Vdp.
The phase difference voltage Vdp requires that the VCO 31 further increase its oscillation frequency. The VCO 31 oscillates a higher frequency (with shorter pulse interval) to generate the oscillation signal So. The oscillation signal So is frequency-divided by the 1/N frequency divider 32 so as to have a 1/N frequency, and the frequency-divided signal Sd is generated. Based on the frequency-divided signal Sd, the pulse generator 33 generates the horizontal deflection current Ihd having an appropriate duty ratio, and supplies the same to the horizontal output device 34.
In this way, in the next horizontal synchronization processing cycle, the wavelength of the flyback pulse FBP supplied to the phase comparator 29 is slightly shorter than that of the flyback pulse FBP supplied in the preceding cycle. Accordingly, the phase difference Dp between the flyback pulse FBP and the H pulse Hp is smaller than that in the preceding cycle.
As a result, the phase difference voltage Vdp supplied to the VCO 31 is smaller than that in the preceding cycle. Therefore, an oscillation frequency OF required by the phase difference voltage Vdp to be increased in the VCO 31 is smaller than that in the preceding cycle. Thus, in the end, the flyback pulse FBP synchronizing with the H pulse Hp is produced, and therefore the horizontal deflection current Ihd synchronizing with the H pulse Hp can be obtained.
Described next is a method of correcting parallelogram distortion using the centering circuit 18. That is, the horizontal distortion correction current Ic, which is a large direct current, is gradually superposed on the centering circuit 18 for each line of horizontal scanning, thereby increasing or decreasing the amount of shift in the horizontal direction for each horizontal scanning line. As a result, the raster frame Fr becomes a parallelogram shape.
FIGS. 42, 43, 44, 45, and 46 show the relation between the horizontal deflection current Ihd and the horizontal distortion correction current Ic to make the raster frame Fr into a parallelogram shape. As described with reference to FIG. 38, when the horizontal distortion correction current Ic is superposed on the horizontal deflection current Ihd, as shown in FIG. 42, the position of the raster frame Fr is shifted with respect to the cabinet display frame Fc. As shown in FIG. 43, the raster frame Fr is originally a collection of a plurality of horizontal scanning lines Lhs1 to LhsN (N is an integer arbitrarily determined for each broadcasting system).
Therefore, as shown in FIG. 42, varying the amount of the horizontal distortion correction current Ic, such as Ic1, Ic2, Ic3 . . . , superposed on the horizontal deflection current Ihd which is supplied from the PLL circuit 14 of FIG. 37 for each cycle causes the horizontal scanning line LhsN to gradually shift to the right as N becomes larger and the raster frame Fr is distorted in a parallelogram shape.
If this operation is applied to a raster frame Frb which has been distorted in a parallelogram shape due to factors during assembling as shown in FIG. 44, a raster frame Fr without distortion can be obtained as shown in FIG. 45.
At this time, the output current of the centering circuit 18 takes a sawtooth waveform synchronizing with the period of the V pulse Vp, as shown in FIG. 46.
Arcuate distortion can be corrected using the same principle as that used for correcting parallelogram distortion, with a parabolic wave instead of a sawtooth wave used for correcting parallelogram distortion.
However, since supplying control voltage to the horizontal deflection controller, the centering circuit is at high voltage and large current. To superpose the correction current thereon, components having high withstand voltage are required, resulting in the larger circuit. That leads to increases in size, weight, and further cost of the whole apparatus.
Further, when a plurality of distortions in the horizontal direction simultaneously occur or when a plurality of correction waves are combined for use, the circuit has to be large to control and generate the correction signals at high voltage and large current, also resulting in an increase in size of the whole apparatus.
The present invention is to solve the above problems, providing a small horizontal distortion correction apparatus for controlling a correction signal at low current.
To achieve the above objects, the present invention has the following aspects.
A first aspect of the present invention is directed to a horizontal distortion correction apparatus for correcting horizontal distortion caused by an assemble error of a CRT display apparatus displaying an image by scanning a video signal, based on a horizontal synchronizing signal included in the video signal, comprising:
a deflector for deflecting an electron beam to display the image on the CRT;
a deflection controller for controlling a display position of the image by applying a horizontal pulse in synchronization with the horizontal synchronizing signal to the deflector; and
a residual phase adder for providing a residual phase for the deflection controller to shift a phase of the horizontal pulse in a direction so as to cancel out the horizontal distortion; wherein
the image scanned in a horizontal direction is displayed without distortion in the horizontal direction.
As described above, in the first aspect, with the use of the residual phase that is originally unavoidable and unremovable, it is possible to more accurately correct horizontal distortion due to low assembling accuracy of the CRT display apparatus.
According to a second aspect, in the first aspect, the deflection controller is constructed by a PLL,
the residual phase adder is a waveform generator capable of generating a modulated signal having a predetermined waveform, and
the modulated signal is supplied to the PLL to control the phase of the horizontal pulse.
As described above, in the second aspect, the PLL circuit controlling distortion can realize correction of image distortion in the horizontal direction, thereby downsizing the apparatus.
According to a third aspect, in the second aspect, the modulated signal has a sawtooth waveform, capable of correcting parallelogram distortion of the image.
A fourth aspect is directed to a horizontal distortion correction method for correcting horizontal distortion caused by an assemble error of a CRT display apparatus displaying an image by scanning a video signal, based on a horizontal synchronizing signal included in the video signal, comprising:
a deflection step of deflecting an electron beam to display an image on the CRT;
a deflection control step of controlling a display position of the image by applying a horizontal pulse in synchronization with a horizontal synchronizing signal to the deflector; and
a residual phase addition step of providing a residual phase for the deflection controller to shift a phase of the horizontal pulse in a direction so as to cancel out the horizontal distortion; wherein
the image scanned in a horizontal direction is displayed without distortion in the horizontal direction.